The present invention relates to an electrically erasable programmable read-only memory (EEPROM) in a semiconductor memory, and particularly to a non-volatile memory device suitable for high-speed erasure and programming.
A conventional non-volatile memory that employs a data rewriting method using erasure and programming is shown in FIG. 2, which is a diagram in Japanese Patent Laid-Open No. 2-292798 corresponding to U.S. application Ser. No. 07/337,566 filed Apr. 13, 1989. An array of EEPROM cells on a chip constitutes a sector, and all of the cells included in a sector are erased simultaneously. This is, the device selects a combination of chips that are to be erased and partly erases them simultaneously. This device is therefore faster and more effective than past devices in which all of the cells of a chip are erased at one time, or a sector is erased at one time.